A Wide-Range Low-Power PLL-Based PI Multiphase Generator Using an Adaptive Frequency Tracking Technique

作者：Jalalifar Majid; Byun Gyung Su^*

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2018, 65(7): 903-907.

DOI：10.1109/TCSII.2017.2726527

• Phase-locked loop
• phase interpolator
• VCO
• memory interface

A phase-locked loop (PLL) along with a linear phase interpolator that generates 64 phases with low jitter in a continuous lock range of 400 MHz-2.2 GHz for mobile memory interfaces is presented. To provide adaptive and precise phase interpolation (PI), a novel frequency tracking PI bias along with a wide-frequency range PLL and lock-detection control are employed. The PLL-based PI is fabricated in 65-nm CMOS and achieves a peak-to-peak and an RMS jitter of 14.8 ps and 2.16 ps, respectively. The measured DNL and INL of the proposed PI are 0.21 LSB and 0.43 LSB, respectively. The PLL-based PI consumes 8.1 mW at a 1.0-V supply.

• 出版日期2018-7