An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of V-MIN Degradation

作者：Kim Tony Tae Hyoung^*; Zhang Wei; Kim Chris H

来源：IEEE Transactions on Circuits and Systems I-Regular Papers, 2012, 59(3): 584-593.

DOI：10.1109/TCSI.2011.2167264

• Circuit reliability
• minimum operating voltage (V-MIN)
• negative bias temperature instability (NBTI)
• static random access memory (SRAM)

Negative bias temperature instability (NBTI) has been considered as a main reliability issue in SRAMs since the threshold voltage degradation of PMOS transistors due to NBTI has raised minimum operating voltage (V-MIN) over time. This paper explains an SRAM reliability test macro designed in a 1.2 V, 65 nm CMOS process technology for statistical measurements of V-MIN degradation coming from NBTI. An automated test program efficiently collects statistical V-MIN data and reduces test time. The proposed test structure enables V-MIN degradation measurements for different SRAM failure modes such as the SNM-limited case and the access-time-limited case. The V-MIN dependency on initial device mismatch and stored data is also presented. The measured time to cell data flip affected by NBTI shows the similar trend of NBTI following a power-law dependency on stress time.

• 出版日期2012-3
• 单位南阳理工学院