A 1.2 Gbps Failsafe Low Jitter LVDS Transmitter-Receiver Applied in CMOS Image Sensor

作者：Fan Wei; Li Zhelu; Xi Jianxiong; He Lenian^*; Sun Kexu; Xie Ning

来源：7th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2018-05-07 to 2018-05-09.

• LVDS
• jitter
• transmitter
• receiver
• failsafe
• CIS

A 1.2 Gbps low-voltage differential signaling (LVDS) transmitter with only 40 ps rms jitter peak-to-peak (2UI, with a capacitive load of 12 pF) and a 1.2 Gbps receiver with a pre-amplifier of high speed and wide input range were designed. The design of the transmitter-receiver are both compliant with TIA-644-A and IEEE 1596.3 standard. This chip was fabricated in a 3.3-V 0.18-mu m CMOS process. The total area of single transmitter-receiver is 0.464 mm(2) and the transmitter and receiver exhibit a power consumption of 12.7 mW and 2.4 mW respectively. A receiver for receiving data clock and 14 parallel transmitters for transmitting data were fully integrated into a high speed CMOS image sensor (CIS) chip.

• 出版日期2018
• 单位中国科学院上海技术物理研究所; 浙江大学