An ECC-Assisted Postpackage Repair Methodology in Main Memory Systems

作者：Kim Dae Hyun^*; Milor Linda

来源：IEEE Transactions on Very Large Scale Integration Systems, 2017, 25(7): 2045-2058.

DOI：10.1109/TVLSI.2017.2671790

• Dynamic random access memory (DRAM)
• error-correction codes (ECCs)
• lifetime
• memory
• postpackage repair (PPR)
• repair
• testing
• yield

As dynamic random access memories (DRAMs) operate in the field, hard errors resulting from wearout occur. Unless corrected or repaired, hard errors halt normal operations, degrading the performance of a system and causing the replacement of memory modules. To improve performance and availability of memory modules, error-correcting codes (ECCs) are employed in a memory system. However, since recent field studies on DRAM errors have shown that a correctable error is highly likely to result in another error with the same address and in the same column or row, incorporating ECCs for mitigating not only soft errors but also hard errors in field operations is insufficient for ensuring reliable field operations. We propose a methodology that detects and repairs aging errors in DRAMs while operating in the field. We propose a methodology that reconfigures the remaining redundant resources after manufacturing-level repair into postpackage redundant resources. We also propose an ECC-assisted postpackage repair (PPR) flow that detects an error, identifies the type and location of the error, and invokes PPR for aging errors without built-in self-test/repair circuits. Employing a 2-GB ECC-dual in-line memory module of data-rate type three synchronous dynamic random access memories as a case study, we demonstrate that our PPR scheme improves the lifetime of DRAMs.

• 出版日期2017-7