科研之友
微信
新浪微博
Facebook
分享链接
摘要
A new diode string based ESD device is proposed. This device, realised in a 0.13 mm SiGe BiCMOS process, features a reduced clamping voltage compared to a conventional diode string topology. The addition of extra stages improves the relative reduction in clamping voltage of the device further and, as for a regular diode string, reduces the parasitic capacitance of the device. Hence the proposed circuit constitutes an excellent candidate for double-diode configurations commonly used to protect RF-pads. The proposed architecture is verified by means of simulation and transmission-line pulse tests. Measurement results of a four-stage version of the proposed diode string show a reduction of 28.5% in clamping voltage, realising an absolute clamping-voltage lower than that of a three-stage diode string.
- 出版日期2012-3-15
