科研之友
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摘要
A method for achieving impedance matching between traces and multilayer via transitions in on-package chip-to-chip links is presented. The method allows determining of the geometry for minimizing the return loss when a signal propagates through the link. For this purpose, analytical equations are derived using a physically-based equivalent circuit to represent the input impedance of multilayer via transitions S-parameter measurements performed to optimized links using the method demonstrate the usefulness of the proposal.
- 出版日期2011-11
