Architecture design of full HD JPEG XR encoder for digital photography applications

作者：Pan Chia Ho^*; Chien Ching Yen; Chao Wei Min; Huang Sheng Chieh; Chen Liang Gee

来源：IEEE Transactions on Consumer Electronics, 2008, 54(3): 963-971.

DOI：10.1109/TCE.2008.4637574

• JPEG XR
• high definition photo
• Joint Photographic Experts Group (JPEG)
• VLSI architecture

To satisfy the high quality image compression requirement, the new, JPEG XR compression standard is introduced. The analysis and architecture design with VLSI architecture of JPEG XR encoder are proposed in this paper which can encode 4:4:4 1920 x 1080 high definition photo in smooth. According to the simulation results, the throughput of the proposed design can encode 44.2 M samples/sec. This design can be used for digital photography applications to achieve low computation, low storage, and high dynamical range features.

• 出版日期2008-8
• 单位中国科学院电工研究所