摘要

This paper presents a low voltage highly linear CMOS up conversion mixer based on current conveyor (CCII), which converts an input of 100 MHz IF signal to an output of 2.4 GHz RF signal. The linearity of the designed mixer is greatly enhanced by utilizing a fully differential current conveyor. The flipped voltage follower (FVF) technique is applied for decreasing the current conveyor nonideality and the nonlinear output resistance of its buffer. Folded cascode structure has been used in the proposed mixer to achieve low supply voltage operation and separate biasing current of local oscillator (LO) switching and transconductance stages of mixer for decreasing the noise level of switching pairs. Full transistor level simulation results performed by Cadence in AMS 0.35 mu m CMOS technology reveal high linearity of the proposed mixer after a FOM-based comparison which has achieved up to 13.32 dBm IIP3, -1.34dBm P-1 dB and 96.7 dBm IIP2 with a conversion gain of 4.2 dB while consumes only 1.2 mW at supply voltage of 1 V.

  • 出版日期2009-7-10