A 33 mW 12.5 Gbps BiCMOS transmitter for high speed backplane applications

作者:Abugharbieh Khaldoon*; Koh Yongseon; Krishnan Shoba; Mohan Jitendra
来源:MICROELECTRONICS JOURNAL, 2014, 45(1): 110-118.
DOI:10.1016/j.mejo.2013.10.008

摘要

This paper describes a 12.5 Gbps voltage mode transmitter with a high speed signal conditioning capability. Using a linear equalizer that is followed by a power efficient output stage, the transmitter achieves pre-emphasis at very low power consumption. In measurements, the transmitter can reliably transmit a 12.5 Gbps PRBS7 signal through a lossy 14 in. FR4 stripline commonly used in backplanes. It achieves a peak to peak jitter of 24 ps, a differential eye opening amplitude of 120 my, and a maximum common mode ripple of 40 mV. The proposed topology consumes 33 mW at-speed power which includes both the output stage and the linear equalizer. It also passes 8KV HBM ESD testing without compromising the high speed capability. The transmitter is fabricated in a 130 nm BiCMOS technology with 100 GHz maximum A and packaged in a commercial leadless leadframe package.

  • 出版日期2014-1