A 1.0-mW, 71-dB SNDR, fourth-order Sigma Delta interface circuit for MEMS microphones

作者:Picolli Luca; Grassi Marco; Fornasari Andrea; Malcovati Piero*
来源:Analog Integrated Circuits and Signal Processing, 2011, 66(2): 223-233.
DOI:10.1007/s10470-010-9516-2

摘要

In this paper an integrated interface circuit for condenser MEMS microphones is presented. It consists of an input buffer followed by a multi-bit (12-levels), analog, second-order Sigma Delta modulator and a fully-digital, single-bit, fourth-order Sigma Delta modulator, thus providing a single-bit output signal with fourth order noise shaping, compatible with standard audio chipsets. The circuit, supplied with 3.3 V, exhibits a current consumption of 215 mu A for the analog part and 95 mu A for the digital part. The measured signal-to-noise and distortion ratio (SNDR) is 71 dB, with an input signal amplitude as large as -1.8 dB with respect to full-scale, obtained thanks to the use of a feed-forward architecture in the analog Sigma Delta modulator, which relaxes the voltage swing requirements of the operational amplifiers. The test chip, fabricated in a 0.35-mu m CMOS process, occupies an area of 3 mm(2), including pads.

  • 出版日期2011-2