DSP-Based Interleaved Buck Power Factor Corrector With Adaptive Slope Compensation

作者：Yang Cheng Yan^*; Liu Yu Chen; Tseng Po Jung; Pan Tian Fu; Chiu Huang Jen; Lo Yu Kang

来源：IEEE Transactions on Industrial Electronics, 2015, 62(8): 4665-4677.

DOI：10.1109/TIE.2015.2400421

• Clamp current mode control
• digital control
• interleaved buck converter
• phase management
• power factor corrector (PFC)

This paper introduces the adaptive slope compensation method into the digital clamping current control at various input voltages to improve the power factor (PF) and the total harmonic distortion (THD) of the universal input. The controller conducts a phase-management mechanism for various input voltages and load conditions to raise the circuit conversion efficiency. The optimal switching timing for one-and two-phase operations can be determined from the power loss distribution. A digital signal processor chip TMS320F28035 is used to implement the digital platform. A 300-W laboratory prototype with a universal line voltage 80-V dc output voltage is designed and tested to verify the feasibility. The values of efficiency from light load (10% of rated power) to full load at 115- and 230-V inputs are greater than 95%. PF values from medium to full load are greater than 0.94. Input current harmonics also meet the norm of IEC 61000-3-2 Class D.

• 出版日期2015-8