A Traveling-Wave CMOS SPDT Using Slow-Wave Transmission Lines for Millimeter-Wave Application

作者：Tang Xiao Lan^*; Pistono Emmanuel; Ferrari Philippe; Fournier Jean Michel

来源：IEEE Electron Device Letters, 2013, 34(9): 1094-1096.

DOI：10.1109/LED.2013.2274452

• 65-nm RF-CMOS process
• millimeter-wave
• single-pole double-throw (SPDT)
• slow-wave coplanar waveguide
• traveling-wave
• triple-well MOS

In this letter, a traveling-wave single-pole double-throw (SPDT) switch using slow-wave coplanar waveguides is implemented in a 65-nm triple-well CMOS process. For performance improvement, double-well body-floating technique is used. The p-well layer and deep n-well layer of nMOSFET being, respectively, biased to -1.4 and 2.0 V, the measured SPDT exhibits an insertion loss of 2.8 dB and an isolation of 20 dB at 60 GHz. A measured input 1-dB compression point (ICP1dB) of 17 dBm is obtained at 35 GHz (16.3 dBm at 60 GHz by simulation). The total chip size is only 0.42 mm(2) (780 mu m x 540 mu m) including all testing pads.

• 出版日期2013-9