摘要

A non-classical device structure namely self-aligned quasi-silicon-on-insulator (SOI) metal-oxide semiconductor (MOS) field-effect transistor with Pi-shaped semiconductor conductive layer (SA-Pi FET) is presented, seeking to improve the performance and upgrade the reliability of the SOI-based devices. Designed to equip with a SA single crystal silicon channel layer, plus a natural source/drain (S/D) tie and a block oxide island (BOI) under the channel, the SA-Pi FET, by minimizing the self-heating and charge sharing issues, thus manages to obtain better stability and reliability. Based on two-dimensional (2-D) simulations, the S/D tie serves to reduce the lattice-atom thermal vibrations and the BOI under the channel is used to control the short-channel effects (SCEs). Also, although the electrical characteristics of the SA-Pi FET are somewhat worse than the SA recessed S/D (ReS/D) ultra-thin (UT) SOI, it works without self-heating increasing.