摘要

Two prototypes of CMOS pixel sensor with in-pixel analog to digital conversion have been developed in a 0.18 mu m CIS process. The first design integrates a discriminator into each pixel within an area of 22 x 33 mu m(2) in order to meet the requirements of the ALICE inner tracking system (ALICE-ITS) upgrade. The second design features 3-bit charge encoding inside a 35 x 35 mu m(2) pixel which is motivated by the specifications of the outer layers of the ILD vertex detector (ILD-VXD). This work aims to validate the concept of in-pixel digitization which offers higher readout speed, lower power consumption and less dead zone compared with the column-level charge encoding.

  • 出版日期2014-2