A Delay-Locked Loop With Statistical Background Calibration

作者：Kao Shao Ku^*; Liu Shen Iuan

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2008, 55(10): 961-965.

DOI：10.1109/TCSII.2008.925664

• Calibration
• charge pump (CP)
• delay-locked loop (DLL)
• phase error

A delay-locked loop (DLL) using a statistical background calibration circuit (SBCC) is presented. This SBCC is utilized to calibrate the charge pump. Eighty identical arbiters with random mismatch effectively measure the phase error between the input and output clocks. Therefore, the static phase error of the DLL is improved. The proposed DLL has been fabricated in 0.18-mu m CMOS process. Its active area is 0.078 mm(2). The power dissipation is 35 mW for the supply of 1.8 V and the input clock of 1.2 GHz. This DLL operates from 900 MHz to 1.2 GHz. The measured static phase error is 15.45 and 2.92 ps without and with the SBCC, respectively at 1.2 GHz.

• 出版日期2008-10
• 单位中国科学院电工研究所