A 0.13-mu m 1-GS/s CMOS Discrete-Time FFT Processor for Ultra-Wideband OFDM Wireless Receivers

作者：Lehne Mark^*; Raman Sanjay

来源：IEEE Transactions on Microwave Theory and Techniques, 2011, 59(6): 1639-1650.

DOI：10.1109/TMTT.2011.2132733

• Analog multipliers
• CMOS analog integrated circuits
• discrete Fourier transforms
• mixed analog-digital integrated circuits
• orthogonal frequency division multiplexing (OFDM)
• signal processing
• ultra-wideband (UWB)

A discrete-time (DT) fast Fourier transform (FFT) processor is presented as an architectural approach to Fourier transform processing multigigahertz of spectral bandwidth. The processor is considered with the specific application of demodulating orthogonal frequency-division multiplexing (OFDM) modulation. The processor enables increased receiver linearity beyond that which is typically limited by the signal-to-noise-and-distortion ratio of high sample rate ADCs by performing OFDM demodulation in the DT domain. The circuit design of the prototype DT-FFT processor is presented and measurement results from the CMOS 0.13-mu m test chip are shown. Results show that the processor demodulates OFDM at 1 GS/s with an accuracy better than 2.8% error vector magnitude while drawing 25 mW from a 1.2-V power supply. The processor demonstrates a measured dynamic range of 49 dB, a 13-dB improvement over that of a 6-bit quantization limited all-digital FFT processor and ADC pair. The DT-FFT is also shown to better tolerate large blocking signals with an 8-dB dynamic range improvement. The DT-FFT core area is 450 mu m x 450 mu m.

• 出版日期2011-6