Design and modeling of high-resolution multibit log-domain modulators

作者:Shaheen Mohamed A*; Savaria Yvon; Hamoui Anas A
来源:Analog Integrated Circuits and Signal Processing, 2014, 79(3): 569-582.
DOI:10.1007/s10470-014-0285-1

摘要

Log-domain Delta-Sigma () modulators are attractive for implementing analog-to-digital (A/D) converters (ADCs) targeting low-power low-voltage applications. Previously reported log-domain modulators were limited to 1-bit quantization and, hence, could not benefit from the advantages associated with multibit quantization (namely, reduced in-band quantization noise, and increased modulator stability). Unlike classical modulators, directly extending a log-domain modulator with a 1-bit quantizer to a log-domain modulator with a multibit quantizer is challenging, in terms of CMOS circuit implementation. Additionally, the realization of log-domain modulators targeting high-resolution applications necessitates minimization of distortion and noise in the log-domain loop-filter. This paper discusses the challenges of multibit quantization and digital-to-analog (D/A) conversion in the log-domain, and presents a novel multibit log-domain modulator, practical for CMOS implementation. SIMULINK models of log-domain modulator circuits are proposed, and the effects of various circuit non-idealities are investigated, including the effects of log-domain compression-expansion mismatch. Furthermore, this paper proposes novel low-distortion log-domain analog blocks suitable for high-resolution analog-to-digital (A/D) conversion applications. Circuit simulation results of a proposed third-order 3-bit class AB log-domain loop-filter demonstrate 10.4-bit signal-to-noise-and-distortion-ratio (SNDR) over a 10 kHz bandwidth with a differential signal input, while operating from a 0.8 V supply and consuming a total power of.

  • 出版日期2014-6
  • 单位McGill