Embedding Repeaters in Silicon IPs for Cross-IP Interconnections

作者：Wang Jinn Shyan^*; Chang Keng Jui; Yeh Chingwei; Chang Shih Chieh

来源：IEEE Transactions on Very Large Scale Integration Systems, 2013, 21(3): 597-601.

DOI：10.1109/TVLSI.2012.2190434

• Blockage
• long interconnection
• repeater
• silicon intellectual property (IP)
• systems-on-a-chip (SoC)

During systems-on-a-chip (SoC) integration, silicon intellectual properties (IPs) are generally regarded as blockages to long interconnections that connect different IPs. With this constraint, conventional designs are forced to place those repeaters that drive long interconnections outside the IP. These designs either lead to a longer interconnection distance requiring more repeaters or result in a longer signal delay, since the interconnection wire is not appropriately segmented by the repeaters. To solve these problems, we designed the IPs such that designers can embed the repeaters in the IP for the SoC integration. In other words, it allows the cross-IP interconnections to be routed over the IP using repeaters inserted in the IP. The design concept, physical implementation, and application examples of the embedded repeaters are described in this brief. Experimental results show that the proposed design will not only make the floor plan of the SoC easier but will also improve the signal delay and the power consumption of the long interconnection circuits.

• 出版日期2013-3
• 单位清华大学