A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays

作者：Chen Yung Chih^*; Eachempati Soumya; Wang Chun Yao; Datta Suman; Xie Yuan; Narayanan Vijaykrishnan

来源：ACM Journal on Emerging Technologies in Computing Systems, 2013, 9(1): 5.

DOI：10.1145/2422094.2422099

• Automatic synthesis
• binary decision diagram
• single-electron transistor

Reducing power consumption has become one of the primary challenges in chip design, and therefore significant efforts are being devoted to find holistic solutions on power reduction from the device level up to the system level. Among a plethora of low power devices that are being explored, single-electron transistors (SETs) at room temperature are particularly attractive. Although prior work has proposed a binary decision diagram-based reconfigurable logic architecture using SETs, it lacks an automatic synthesis algorithm for the architecture. Consequently, in this work, we develop a product-term-based approach that synthesizes a logic circuit by mapping all its product terms into the SET architecture. The experimental results show the effectiveness and efficiency of the proposed approach on a set of MCNC benchmarks.

• 出版日期2013-2