Developments of SOI monolithic pixel detectors

作者:Arai Y*; Miyoshi T; Unno Y; Tsuboyama T; Terada S; Ikegami Y; Kohriki T; Tauchi K; Ikemoto Y; Ichimiya R; Ikeda H; Hara K; Miyake H; Kochiyama M; Sega T; Hanagaki K; Hirose M; Hatsui T; Kudo T; Hirono T; Yabashi M; Furukawa Y; Varner G; Cooney M; Hoedlmoser H; Kennedy J; Sahoo H; Battaglia M; Denes P; Vu C; Contarato D; Giubilato P; Glesener L; Yarema R; Lipton R; Deptuch G; Trimpl M; Ohno M; Fukuda K; Komatsubara H
来源:Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment , 2010, 623(1): 186-188.
DOI:10.1016/j.nima.2010.02.190

摘要

A monolithic pixel detector with 0.2 mu m silicon-on-insulator (SOI) CMOS technology has been developed. It has both a thick high-resistivity sensor layer and thin LSI circuit layer on a single chip. Integration-type and counting-type pixel detectors are fabricated and tested with light and X-rays. The process is open to many researchers through Multi Project Wafer (MPW) runs operated by KEK. Further improvements of the fabrication technologies are also under investigation by using a buried p-well and 3D integration technologies.

  • 出版日期2010-11-1