Design of a Contention-Free Parallel Double-Flow MAP Decoder

作者：Chung Jae Hun; Park Heemin; Rim Chong S^*

来源：IEEJ Transactions on Electrical and Electronic Engineering, 2015, 10(1): 70-74.

DOI：10.1002/tee.22060

• MAP
• turbo decoder
• QPP interleaver
• parallel processing
• contention free

Parallel processing and double-flow methods, which are used to increase the speed of turbo-code decoding, cause memory contentions. Although memory contentions due to parallel processing can be resolved by adopting the quadratic polynomial permutation (QPP) interleaver, the double-flow method still causes memory contentions because of its read/write sequences from both ends of the input packets. Thus, we propose a modified architecture to resolve memory contentions for the double-flow method to fit the QPP interleaver. In our experiment, the proposed method has a shorter decoding time and smaller hardware size compared the conventional method. A bit-accurate simulation was performed, and hardware implementation with field-programmable gate arrays (FPGAs) led to a high throughput of 80 Mbps.

• 出版日期2015-1