Analysis and Evaluation of a BJT-Based 1T-DRAM

作者：Choi Sung Jin^*; Han Jin Woo; Moon Dong Il; Choi Yang Kyu

来源：IEEE Electron Device Letters, 2010, 31(5): 393-395.

DOI：10.1109/LED.2010.2042675

• BJT
• BV(CEO)
• capacitorless DRAM
• heterogeneous
• heterojunction bipolar transistor (HBT)
• latch
• parasitic
• silicon carbide (SiC)
• valence band offset
• 1T-DRAM

ABJT-based 1T-DRAM that utilizes a latch process is analyzed in an experimental assessment. The experimental study reveals that undesired activation of a parasitic BJT by a high leakage current inhibits aggressive scaling of a BJT-based 1T-DRAM. Given the importance of choosing proper operation biases, the drain voltage that triggers the latch process in the BJT-based 1T-DRAM should be reduced to avoid unwanted parasitic BJT activation. Hence, a heterogeneous source and drain is proposed to ensure the energy bandgap offset to silicon channel. A numerical evaluation confirms that a heterogeneous source and drain embedded structure is a promising candidate for high-density and low-power DRAM technologies.

• 出版日期2010-5