摘要

A novel LDNMOS embedded silicon controlled rectifier (SCR) was proposed to enhance ESD robustness of high-voltage (HV) LDNMOS based on a 0.5 mu m 18 V CDMOS process. A two-dimensional (2D) device simulation and a transmission line pulse (TLP) testing were used to analyze the working mechanism and ESD performance of the novel device. Compared with the traditional GG-LDNMOS, the secondary breakdown current (I (t2)) of the proposed device can successfully increase from 1.146 A to 3.169 A with a total width of 50 mu m, and ESD current discharge efficiency is improved from 0.459 mA/mu m(2) to 1.884 mA/mu m(2). Moreover, due to their different turn-on resistances (R (on)), the device with smaller channel length (L) owns a stronger ESD robustness per unit area.