An MTCMOS technology for low-power physical design

作者：Zhou Qiang; Zhao Xin; Cai Yici^*; Hong Xianlong

来源：Integration, the VLSI Journal, 2009, 42(3): 340-345.

DOI：10.1016/j.vlsi.2008.09.004

• MTCMOS
• Low power
• Placement
• Physical design

Multi-threshold CMOS (MTCMOS) technology is an effective sub-threshold leakage power reduction method in CMOS circuits, which satisfies high-performance and low-power design requirements. The optimization of virtual supply network plays an important role in MTCMOS low-power design. Existing low-power works are mainly on gate level, without any optimization on physical design level, which can lead to a large amount of virtual supply networks. Merging the objective of virtual networks minimization into physical design, this paper presents (1) a low-power-driven physical design flow; (2) a novel low-power placement to simultaneously place standard cells and sleep transistors; and (3) the sleep transistor relocation technique to further reduce the virtual supply networks. Experimental results are promising for both achieving up to 28.15% savings for virtual supply networks and well controlling the increase of signal nets.

• 出版日期2009-6
• 单位清华大学