摘要

A current-reused injection-locked frequency multiplication/division circuit is presented. By using a similar circuit core, a V-band (50-75 GHz) multiply-by-1.5 injection-locked frequency multiplier and an F-band (90-140 GHz) divide-by-6 injection-locked frequency divider are realized in 40-nm CMOS. Measured locking ranges of the multiplier and divider are 3.04 GHz (5.2%) and 8.17 GHz (6.7%), respectively. By using a harmonic peaking technique, a V-band multiply-by-2.5 multiplier and an F-band divide-by-10 divider are presented. The measured locking ranges of are 3.06 GHz (6.1%) and 8.56 GHz (8.5%), respectively.

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