Design of Monolithic Low Dropout Regulator for Wireless Powered Brain Cortical Implants Using a Line Ripple Rejection Technique

作者：Zheng Chen^*; Ma Dongsheng

来源：IEEE Transactions on Circuits and Systems II-Express Briefs, 2010, 57(9): 686-690.

DOI：10.1109/TCSII.2010.2056090

• Dynamic voltage scaling (DVS)
• line regulation
• line ripple rejection (LRR)
• low dropout (LDO) regulator

This brief introduces an integrated low dropout regulator for wireless powered brain cortical implants. A line ripple rejection technique is employed to improve the line regulation of the regulator. A fast transient response is ensured to accommodate frequent changes of workload and power. The system is stabilized over the entire load range without using any external compensation capacitors. System modeling and theoretical analysis are conducted to offer a systematic study on the proposed structure. The regulator was fabricated with an IBM 130-nm CMOS process. The active die area is 0.025 mm(2). Experimental results show that the power supply rejection ratio remains above 52.8 dB within the interested frequency band. The line regulation is controlled below 0.44% throughout the full input range. The output voltage can recover within 69 ns from a full load current change, with a less than 8.1-mV voltage droop.

• 出版日期2010-9