Measurement and Analysis of Power Noise Characteristics for EMI Awareness of Power Delivery Networks in 3-D Through-Silicon Via Integration

作者：Araga Yuuki^*; Nagata Makoto; Miura Noriyuki; Ikeda Hiroaki; Kikuchi Katsuya

来源：IEEE Transactions on Components, Packaging and Manufacturing Technology, 2018, 8(2): 277-285.

DOI：10.1109/TCPMT.2017.2767065

• 3-D-stacked large-scale integration (3-D-LSI)
• electromagnetic compatibility (EMC)
• electromagnetic interference (EMI)
• in-stack evaluation

The 3-D-stacked large-scale integration (3-D-LSI) chips provide densely integrated capacitance and low impedance in vertically and horizontally distributed power delivery networks. This paper proposes a 3-D-LSI with superior electromagnetic interference (EMI) characteristics. A three-tier 3-D-LSI demonstrator integrated with through-silicon vias is manufactured. Self-interfering EMI suppression characteristics are captured by an embedded in-stack monitoring system and explained by a simple lumped component model including the entire test structure. Electromagnetic leakage, which affects other devices, is also characterized by the model. Chip evaluation and the model show good EMI characteristics, which arise from local shunting by a vertically integrated decoupling capacitor and from implicit capacitance.

• 出版日期2018-2