A novel low-spur DDFS utilizing the twice second-order high-pass error feedback architecture

作者：Jeng Shiann Shiun^*; Lin Hsing Chen; Jhuang Wei Sheng; Lee Yen Ching

来源：International Journal of Circuit Theory and Applications, 2014, 42(6): 551-561.

DOI：10.1002/cta.1869

• high-pass error feedback (HPEF)
• phase truncation
• spur
• direct digital frequency synthesizer (DDFS)

In this paper, the twice second-order high-pass error feedback (EF) (twice second-order high-pass EF (HPEF)) utilizing re-feedback process and phase-bit splitting technique in the second-order HPEF to design a simplified low-spur direct digital frequency synthesizer is proposed. The proposed method performs phase-bit splitting technique and re-feedback process in order to make the phase change tremendously and scramble the periodicity of the phase sequences violently in the original feedback path. In addition, the noise spectrum power is spread more uniformly in order to effectively suppress the spurs due to phase-truncated error effect. Thus, the twice second-order HPEF is implemented on a field programmable gate array development board, the Altera Stratix II EP2S60. The simulation and experimental results show that the proposed method can effectively achieve better spectrum performance, such as spurious-free dynamic range, as compared to basic phase truncation, first-order HPEF and second-order HPEF architectures.

• 出版日期2014-6
• 单位东华大学