摘要

A novel technique was developed to effectively planarize the high-K metal gate etch-back in the advanced CMOS fabrication, where the feature size is scaled down to 45 nm. In the newly-developed technique, the two-step spin-on-glass plasma etch-back was combined with in-situ oxygen plasma treatment. The negative effect of the non-uniform distribution of the polymer on the reactive ion-etching rate was eliminated. As a result, the thickness non-uniformity within-the-wafer (excluding the 5 mm wafer edges) can be easily realized. In the scanning electron micrographs of the planarized metal gate etch-back, no chemical-mechanical-polish-like "dish effect" was observed on both the isolated and the dense sub-micro gate-stack structures, indicating that the planarization technology does a good job for the nano-scale high-K /metal gate-last CMOS device integration.

  • 出版日期2012

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