A high-throughput fixed-point complex divider for FPGAs

作者：Wang Dong; Ren Pengju; Liu Leibo^*

来源：IEICE Electronics Express, 2013, 10(4): 20120879.

DOI：10.1587/elex.10.20120879

• complex divider
• FPGA
• CORDIC

This paper presents a high-throughput fixed-point complex divider which uses four pipelined CORDIC units to transform and divide complex numbers in Polar coordinates. By persevering the macro-angle for CORDIC rotations in redundant form and developing an optimized pipelining structure, the FPGA based implementation achieves a 9x advantage on throughput over the best design reported. In addition, the final error is guaranteed within 1 ulp (unit in last position). Thus the proposed complex divider is highly suitable for accelerating DSP applications with high precision numerical accuracy requirements.

• 出版日期2013
• 单位清华大学; 西安交通大学