Multilevel silicide interconnect in monolithic microsensors

作者：Hu Bin^*; Ruan Ai Wu; Li Ping; Zhai Ya Hong; Cai Dao Lin

来源：Journal of Shanghai Jiaotong University, 2007, 41(SUPPL.): 36-40.

• Ferroelectric
• Interconnect process
• Multilevel silicide

A novel local and global interconnect technique employing silicide in fabrication of monolithic microsensors was presented. Compatible with standard CMOS fabrication process, this interconnect process can resist high-temperature in the post process of the monolithic integration of microsensor and IC. With this new interconnect process utilized in standard CMOS procedures, thermal budget dilemma often encountered in the case of backend processing temperature of monolithic integration can be addressed. This interconnect system possesses the characteristics of higher temperature resistance than aluminum, higher step coverage, better thermal stability, better adhesion, compatibility with CMOS process, easy dry etching and lower resistance, so it can satisfy the requirements of multi-level interconnects of VLSI. The circuit samples can work after being annealed at 500°C for 5 hours, 600°C for 30 minutes, and 650°C for 5 minutes, respectively, which meets the requirements of monolithic integration of microsensor and IC.

• 出版日期2007