A 4096-Point Radix-4 Memory-Based FFT Using DSP Slices

作者：Garrido Mario^*; Angel Sanchez Miguel; Luisa Lopez Vallejo Maria; Grajal Jesus

来源：IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 25(1): 375-379.

DOI：10.1109/TVLSI.2016.2567784

• Fast Fourier transform (FFT)
• field programmable gate array (FPGA)
• memory-based architecture
• radix-4
• VLSI

This brief presents a novel 4096-point radix-4 memory-based fast Fourier transform (FFT). The proposed architecture follows a conflict-free strategy that only requires a total memory of size N and a few additional multiplexers. The control is also simple, as it is generated directly from the bits of a counter. Apart from the low complexity, the FFT has been implemented on a Virtex-5 field programmable gate array (FPGA) using DSP slices. The goal has been to reduce the use of distributed logic, which is scarce in the target FPGA. With this purpose, most of the hardware has been implemented in DSP48E. As a result, the proposed FPGA is efficient in terms of hardware resources, as is shown by the experimental results.

• 出版日期2017-1