A capacitorless low-dropout regulator with enhanced slew rate and 4.5-quiescent current

作者：Yeo Jaejin; Javed Khurram; Lee Jaeseong; Roh Jeongjin^*; Park Jae Do

来源：Analog Integrated Circuits and Signal Processing, 2017, 90(1): 227-235.

DOI：10.1007/s10470-016-0869-z

• Voltage regulator
• Low-dropout regulator
• High slew rate

In this paper, an output-capacitorless, low-dropout (LDO) voltage regulator with excellent load regulation and fast recovery time was designed using two amplifiers, which provided high gain, high bandwidth (HBW), and high slew rate (HSR). In addition, a one-shot current boosting (OSCB) circuit was added for current control to charge and discharge the parasitic capacitance at the power transistor gate during the load-current transition to improve the response time. The experimental results show that the proposed LDO regulator consumes a quiescent current of only 4.5 and can deliver a maximum load current of 200 mA, while regulating the output voltage at with a 1.2 V power supply. We experimentally verified that for a current transition from 0.1 to 200 mA, the undershoot and overshoot voltages were 260 and , with recovery times of only 0.8 and 0.85 , respectively.

• 出版日期2017-1