A 0.18 μm CMOS low noise amplifier using a current reuse technique for 3.1-10.6 GHz UWB receivers

作者：Wang Chunhua^*; Wan Qiuzhen

来源：Chinese Journal of Semiconductors, 2011, 32(8).

DOI：10.1088/1674-4926/32/8/085002

• Chip areas
• CMOS
• CMOS low noise amplifiers
• common source
• Common source amplifier
• current reuse
• Flat-gain
• Frequency ranges
• Inductive degeneration
• Inductive peaking
• Input matching
• Input-referred third-order intercept points
• Input/output
• Inter-stage inductor
• Low complexity
• Low noise
• Low noise figure
• Maximum power gain
• Return loss
• Reverse isolation
• RF-CMOS
• Supply voltages
• UWB receivers
• Wide-band

A new, low complexity, ultra-wideband 3.1-10.6 GHz low noise amplifier (LNA), designed in a chartered 0.18 μm RFCMOS technology, is presented. The ultra-wideband LNA consists of only two simple amplifiers with an inter-stage inductor connected. The first stage utilizing a resistive current reuse and dual inductive degeneration technique is used to attain a wideband input matching and low noise figure. A common source amplifier with an inductive peaking technique as the second stage achieves high flat gain and wide -3 dB bandwidth of the overall amplifier simultaneously. The implemented ultra-wideband LNA presents a maximum power gain of 15.6 dB, and a high reverse isolation of -45 dB, and good input/output return losses are better than -10 dB in the frequency range of 3.1-10.6 GHz. An excellent noise figure (NF) of 2.8-4.7 dB was obtained in the required band with a power dissipation of 14.1 mW under a supply voltage of 1.5 V An input-referred third-order intercept point (IIP3) is -7.1 dBm at 6 GHz. The chip area, including testing pads, is only 0.8 × 0.9 mm 2.

• 出版日期2011