A Low-Noise, Low-Power, Wide Dynamic Range Logarithmic Amplifier for Biomedical Applications

作者：Sundarasaradula Yuwadee^*; Thanachayanont Apinunt

来源：Journal of Circuits, Systems, and Computers, 2018, 27(7): 1850104.

DOI：10.1142/S0218126618501049

• Logarithmic amplifier
• limiting amplifier
• subthreshold operation
• biomedical applications

This paper presents the design and realization of a low-noise, low-power, wide dynamic range CMOS logarithmic amplifier for biomedical applications. The proposed amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. A DC offset cancellation feedback loop is used to prevent output saturation and deteriorated input sensitivity from inherent DC offset voltages. The proposed logarithmic amplifier was designed and fabricated in a standard 0.18 mu m CMOS technology. The prototype chip includes six limiting amplifier stages and an on-chip bias generator, occupying a die area of 0.027 mm(2). The overall circuit consumes 9.75 mu W from a single 1.5V power supply voltage. Measured results showed that the prototype logarithmic amplifier exhibited an 80 dB input dynamic range (from 10 mu V to 100 mV), a bandwidth of 4 Hz-10 kHz, and a total input-referred noise of 5.52 mu V.

• 出版日期2018-6-30