Antiwear Leveling Design for SSDs With Hybrid ECC Capability

作者：Ho Chien Chung^*; Liu Yu Ping; Chang Yuan Hao; Kuo Tei Wei

来源：IEEE Transactions on Very Large Scale Integration Systems, 2017, 25(2): 488-501.

DOI：10.1109/TVLSI.2016.2589318

• Antiwear leveling
• Bose-Chaudhuri-Hocquenghem (BCH)
• Flash memory
• Flash storage device
• hybrid error correction code (ECC)
• low-density parity check (LDPC)
• solid-state drive (SSD)
• storage systems

With the joint considerations of reliability and performance, hybrid error correction code (ECC) becomes an option in the designs of solid-state drives (SSDs). Unfortunately, wear leveling (WL) might result in the early performance degradation to SSDs, which is common with a limited number of P/E cycles, due to the efforts to delay the bit-error-rate growth. In this paper, an anti-WL design is proposed to avoid such a performance problem so that the performance of SSDs with hybrid ECC capability can be improved without sacrificing their reliability. The capability of the proposed design was evaluated by a series of experiments, for which it was shown that the proposed design could greatly improve the read and write performance of SSDs up to 50% without affecting the endurance of the investigated SSDs, compared with traditional approaches.

• 出版日期2017-2
• 单位中国科学院