A 250 mV 7.5 mu W 61 dB SNDR SC Delta Sigma Modulator Using Near-Threshold-Voltage-Biased Inverter Amplifiers in 130 nm CMOS

作者：Michel Fridolin^*; Steyaert Michiel S J

来源：IEEE Journal of Solid-State Circuits, 2012, 47(3): 709-721.

DOI：10.1109/JSSC.2011.2179732

• Analog integrated circuits
• analog-to-digital converter
• delta-sigma
• inverter-based switched capacitor circuits
• low power
• ultra-low voltage

An ultra-low voltage switched-capacitor (SC) Delta Sigma converter running at a record low supply voltage of only 250 mV is introduced. System level aspects are discussed and special circuit techniques described, that enable robust operation at such a low supply voltage. Using a SC biasing approach, inverter-based integrators are realized with overdrives close to the transistor threshold voltage V-th while compensating for process, voltage and temperature (PVT) variation. Biasing voltages are generated on-chip using a novel level shifting circuit, that overcomes headroom limitations due to saturation voltage V-sat. With an oversampling ratio (OSR) of 70 and a sampling frequency (fs) of 1.4 MHz at 250 mV power supply the converter achieves 61 dB SNDR in 10 kHz bandwidth while consuming a total power of 7.5 mu W.

• 出版日期2012-3