摘要

In this study, we propose a module-level three-stage approach (TSA) to optimize the evolutionary design for synchronous sequential circuits. TSA has a three stages process, involving a genetic algorithm (GA), a pre-evolution, and a re-evolution. In the first stage, the GA simplifies the number of states and automatically searches the state assignment that can produce the circuit with small complexity. Then, the second stage evolves a set of high-performing circuits to acquire frequently evolved blocks, which will be re-used for more compact and simple solutions in the next stage. In this stage, a genetic programming (GP) is proposed for evolving the high-performing circuits and data mining is used as a finder of frequently evolved blocks in these circuits. In the final stage, the acquired blocks are encapsulated into the function and terminal set to produce a new population in the re-evolution. The blocks are expected to make the convergence faster and hence efficiently reduce the complexity of the evolved circuits. Seven problems of three types-sequence detectors, modulo-n counters and ISCAS89 circuits-are used to test our three-stage approach. The simulation results for these experiments are promising, and our approach is shown to be better than the other methods for sequential logic circuits design in terms of convergence time, success rate, and maximum fitness improvement across generations.