A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage

作者：Briseno Vidrios Carlos^*; Edward Alexander; Shafik Ayman; Palermo Samuel; Silva Martinez Jose

来源：IEEE Journal of Solid-State Circuits, 2017, 52(3): 657-668.

DOI：10.1109/JSSC.2016.2634700

• Analog-to-digital converters (ADCs)
• broadband ADCs
• current buffer
• low power
• oversampling ADCs
• sigma-delta modulators
• single amplifier biquad (SAB)
• transimpedance amplifiers (TIAs)

A wide-bandwidth (BW) power-efficient continuoustime Sigma Delta modulator (CT Sigma Delta M) is presented. The modulator introduces a third-order filter implemented with a lossless integrator and a multiple-feedback single-amplifier biquadratic filter with embedded loop stability compensation. An active summing block is implemented by employing a common-gate current buffer followed by a transimpedance amplifier. This combination relaxes the specification requirements of the operational amplifier by making its required BW independent of the closed-loop gain. The proposed technique achieves optimum BW with reduced power consumption, making it functional for over gigahertz operation. Fabricated in a standard 40-nm CMOS technology, and clocked at 3.2 GHz, the CT Sigma Delta M achieves a signal-to-noiseand-distortion ratio of 65.5 dB over 75-MHz BWwhile consuming 22.8 mW of power. The obtained Walden's figure of merits is 98 fJ/conv-step.

• 出版日期2017-3