An Eight-Element 2-16-GHz Programmable Phased Array Receiver With One, Two, or Four Simultaneous Beams in SiGe BiCMOS

作者：Sayginer Mustafa^*; Rebeiz Gabriel M

来源：IEEE Transactions on Microwave Theory and Techniques, 2016, 64(12): 4585-4597.

DOI：10.1109/TMTT.2016.2620144

• Digital beamforming (DBF)
• in-phase/quadrature (I/Q) network
• phased arrays
• phase shifters (PSs)
• reconfigurable beamforming network
• satellite communications
• SiGe BiCMOS
• variable gain amplifier (VGA)
• vector modulator
• wideband balun

This paper presents an eight-element 2-16-GHz programmable phased array (PPA) receiver in a 0.13-mu m SiGe BiCMOS with the reconfigurable number of beams and with the digital beamforming (DBF) capabilities. The eight-element chip can be configured for one, two, or four simultaneous beams or as an element-level DBF receiver. This is achieved using reconfigurable input switching and output combining networks with wideband active switches and combiners. The phased array channel results in a 5-b performance at 3-14 GHz (rms error <5 degrees) and a 4-b performance at 2-16 GHz (rms error <8.5 degrees). Each channel also contains a 3-b variable gain amplifier with 8-dB gain control at 2-16 GHz. The chip results in an 8-12-dB gain at 2-16 GHz (depending on the PPA mode), a noise figure (NF) of 12 dB, and an input (P1 dB) of -20 dBm per channel when all channels are activated. The chip consumes 250 mW per channel, which is competitive knowing its bandwidth and linearity. The DBF function also results in a wideband response with a gain and an NF of 15-16 and 12-13 dB, respectively, and high linearity (input P-1 dB = -16 dBm) at 2-16 GHz. The programmable phased array receiver allows a single chip to be used over S-, C-, X-, and Ku-bands for a variety of applications such as satellite communications and point-to-point links. This results in faster and lower-cost phased array development since the same chip and its field-programmable gate array control can be reused from system to system, but with different antenna and grid spacing. The PPA removes the need to develop a different chip for every application and allows the development of phased arrays at commercial scales.

• 出版日期2016-12