摘要

A dual workfunction gate (DWG) is proposed for the thin-gate-insulator Schottky-barrier MOSFETs (SBMOS) to adjust the barrier distributions by self-aligned tilt-angle implantation. Effects of DWG on SBMOS are investigated using 2-D simulations. Against junction engineering by dopant segregation, as the gate insulator scaled, the stronger gate coupling from DWG can both improve the ON-state barrier lowering for electron and enhance the OFF-state barrier widening for hole. By using DWG architecture, SBMOS can be successfully scaled with thinner gate insulator as the promising candidate for next-generation CMOS devices.

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