Analysis and optimization of leakage current characteristics in sub-65 nm dual V-t footed domino circuits

作者：Gong Na^*; Guo Baozeng; Lou Jianzhong; Wang Jinhui

来源：MICROELECTRONICS JOURNAL, 2008, 39(9): 1149-1155.

DOI：10.1016/j.mejo.2008.01.028

• footed domino circuit
• dual threshold voltage
• leakage current
• process variation

The inputs and clock signals combination sleep state dependent leakage current characteristics is analyzed and the optimal sleep state is examined in sub-65 nm dual V-t footed domino circuits. Simulations based on 65 and 45 nm BSIM4 models show that the conventional CHIL state (the clock signal is high and inputs are all low) is ineffective for lowering the leakage current and the conventional CHIH state (the clock signal and inputs are all high) is only effective to suppress the leakage current at high temperature other than the high fan-in domino circuits. For the high fan-in footed domino circuits at high temperature and most of footed domino circuits at room temperature, the CLIL (the clock signal and inputs are all low) state is preferable to reduce the leakage current. Further, the influence of the process variations on the leakage current characteristics of the dual V, footed domino circuits is also evaluated. It is observed that the average leakage current is universally higher than the date reported in the normal corner and the CLIL state is the optimum choice considering the leakage current reduction and the robustness to the process variations simultaneously.

• 出版日期2008-9
• 单位北京工业大学; 河北大学