LOW POWER FRACTIONAL-N FREQUENCY DIVIDER WITH IMPROVED RESOLUTION

作者：Zackriya V Mohammed^*; Reuben John; Harsh Ashim; Kittur Harish M

来源：Journal of Circuits, Systems, and Computers, 2014, 23(8): 1450112.

DOI：10.1142/S0218126614501126

• Multiple clock domain (MCD) systems
• fractional-N frequency divider (FFD)
• resolution
• division ratio error

Multiple clock domain (MCD) systems have different blocks/IP cores operating at different frequencies. These different clocks are generated from a high frequency clock usually by integer division. Fractional-N frequency dividers (FFDs) are needed when the clock required by a block in MCD system is not possible to be derived by simple integer division. In this paper, we present such a FFD with an improved resolution of (1/8). Post layout simulation results after parasitic RC extraction in the 90-nm technology node show that our FFD is able to fractionally divide signals upto 2 GHz frequency with an average error of 0.11% in division ratio even with 2.5 degrees phase error at the input. Our FFD consumes 754 mu W when fractionally dividing a 2 GHz signal with a resolution of (1/8).

• 出版日期2014-9