A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers

作者：Boo Hyun H^*; Boning Duane S; Lee Hae Seung

来源：IEEE Journal of Solid-State Circuits, 2015, 50(12): 2912-2921.

DOI：10.1109/JSSC.2015.2467183

• Analog-to-digital converter
• op-amp
• pipelined ADC
• reference buffer
• switched-capacitor circuits
• virtual ground reference buffer

The virtual ground reference buffer (VGRB) technique is introduced as a means to improve the performance of switched-capacitor circuits. The technique enhances the performance by improving the feedback factor of the op-amp without affecting the signal gain. The bootstrapping action of the level-shifting buffers relaxes key op-amp performance requirements including unity-gain bandwidth, noise, open-loop gain and offset compared with conventional circuits. This reduces the design complexity and the power consumption of op-amp based circuits. Based on this technique, a 12 b pipelined ADC is implemented in 65 nm CMOS that achieves 67.0 dB SNDR at 250 MS/s and consumes 49.7 mW of power from a 1.2 V power supply.

• 出版日期2015-12