摘要

Physical unclonable PUF) is a promising hardware security primitive for secure key generation and chip identification. This paper proposes a multi-port and low-power PUF based on MOSFET current-division deviation. Owing to the multi-port, it can parallelly generates multi-bit identifications (IDs) in one clock cycle. Moreover, with the MOSFET current-division array operating at sub-threshold region, it displays a low power consumption characteristic. As an embodiment, a 32-port PUF is implemented with full-custom design on 65 nm CMOS process, wherein the layout area and the power dissipation are 35178 mu m(2) and 10.3 mu W (@1.2V/100 MHz), respectively. Post-layout simulation results show that it has a high performance in terms of randomness and uniqueness. In addition, it exhibits a worst case reliability of 98.62% over temperature range of 40 degrees C to 120 degrees C and 10% fluctuations in supply voltage, indicating an encouraging reliability and effectiveness.