摘要

A wideband frequency multiplier that effectively generates and combines the even harmonics from multiple transistors is proposed. It takes advantage of standing-wave formation and loss cancellation in a distributed structure to generate high amplitude signals resulting in high harmonic power. Wide bandwidth operation and odd harmonic cancellation around the center frequency are the inherent properties of this frequency multiplier. Using this methodology, we implemented a frequency doubler that operates from 220 GHz to 275 GHz in a standard 65 nm CMOS process. Output power of -6.6 dBm (0.22 mW) and conversion loss of 11.4 dB are measured at 244 GHz.

  • 出版日期2011-12