摘要

This paper presents an approach to simultaneously cancel flicker noise and IM3 in Gilbert-type mixers, utilizing negative impedances. For proof of concept, two prototype double-balanced mixers in 0.16-mu m CMOS are fabricated. The first demonstration mixer chip was optimized for full IM3 cancellation and partial flicker noise cancellation; this chip achieves 9-dB flicker noise suppression, improvements of 10 dB for IIP3, 5 dB for conversion gain, and P-1 dB for input while the thermal noise increased by 0.1 dB. The negative impedance increases the power consumption for the mixer by 16% and increases the die area by 8% (46 x 28 mu m(2)). A second demonstration mixer chip aims at full flicker noise cancellation and partial IM3 cancellation, while operating on a low supply voltage (0.67 x V-DD); in this chip, the negative impedance increases the power consumption by 7.3% and increases the die area by 7% (50 x 20 mu m(2)). For one chip sample, measurements show %26gt;10-dB flicker noise suppression within +/-200% variation of the negative impedance bias current; for ten randomly selected chip samples, %26gt;11-dB flicker noise suppression is measured.

  • 出版日期2013-10