摘要

An analytical formulation of the threshold voltage variance induced by random dopant fluctuations in junctionless transistors is derived for both cylindrical nanowire and planar double-gate structures under uniform channel and constant mobility approximation. Results from drift-diffusion-based numerical methods are in reasonable agreement also for large V-DS, including mobility variations, and for short gate lengths. The results clearly indicate that the threshold voltage fluctuations can become a concern with the reduction of the critical dimensions.

  • 出版日期2012-3