Analysis of Electrothermal Characteristics of GAA Vertical Nanoplate-Shaped FETs

作者：Son Dokyun; Myeong Ilho; Kim Hyunsuk; Kang Myounggon; Jeon Jongwook^*; Shin Hyungcheol^*

来源：IEEE Transactions on Electron Devices, 2018, 65(7): 3061-3064.

DOI：10.1109/TED.2018.2832239

• Gate all around (GAA)
• gate delay (tau delay)
• nanoplate
• self-heating effect (SHE)
• technology computer-aided design (TCAD)
• vertical device

In this paper, the thermal and electrical characteristics of a gate-all-around (GAA) vertical nanoplate-shaped field-effect transistor (vNPFET) are studied for sub-5-nm technologies using well-calibrated technology computer-aided design simulations. An asymmetric structure of a vertical device has different characteristics that depend on the source/drain position. When the source and the drain are placed at the top and the bottom electrodes, respectively, the GAA-v NPFET drive current increases, but the self-heating effect becomes worse. To co-optimize the performance and the reliability, the gate delay (tau(delay)) and the thermal resistance (R-th) were evaluated simultaneously in terms of various geometric factors for the first time, showing that a reckless scaling of the channel thickness below 5 nm significantly degrades the electrothermal characteristics.

• 出版日期2018-7