UIBF decoding to lower the error floors of high-rate systematic LDPC codes

作者：Lim J; Shin D J

来源：Electronics Letters, 2017, 53(4): 247-249.

DOI：10.1049/el.2016.2827

• parity check codes
• iterative decoding
• UIBF decoding
• error floors
• high-rate systematic LDPC codes
• unreliability based information bit flipping
• cyclic redundancy check
• decoded codeword
• sum product decoding
• SP decoding
• IEEE 802
• 16e standard
• SP decoding scheme

An unreliability-based information bit flipping (UIBF) decoding using cyclic redundancy check is proposed to lower the error floors of high-rate systematic low-density parity-check (LDPC) codes. Unsuccessfully decoded codeword is redecoded by the UIBF decoding with very low complexity at the end of every iteration of the sum-product (SP) decoding. The proposed scheme is applied to LDPC codes of the IEEE 802.16e standard. Simulation results show that the proposed scheme effectively lowers the error floors of systematic LDPC codes with smaller number of iterations compared with the conventional SP decoding scheme, which leads to the reduced power consumption and increased data throughput.

• 出版日期2017-2